COMPLEX COdesign and power Management in PLatform-based design space EXploration

Motivation

COMPLEX consortium develops a new design environment for platform-based design-space exploration offering developers of next-generation mobile embedded systems a highly efficient design methodology and tool chain. The integrated environment allows iterative exploration and refinement of advanced applications to meet market requirements. The design technology in particular enables fast simulation and explores the use of different implementations at Electronic System Level (ESL) with up to bus-cycle accuracy at the earliest instant in the design cycle. The main objectives are:

  • Highly efficient and productive design methodology and holistic framework for design space exploration of embedded HW/SW systems. The framework will be platform independent and application domain independent and will provide open interfaces for new industry players.
  • Combination and augmentation of well established ESL synthesis & analysis tools into a seamless design flow enabling performance & power aware virtual prototyping of the HW/SW system.
  • Interfacing next-generation model-driven SW design approach and industry standard model-based design environments.
  • Multi-objective co-exploration for assessing design quality and optimizing the system platform with respect to performance, power, and reliability metrics.
  • Fast simulation and assessment of the platform at ESL with up to bus-cycle accuracy at the earliest instant in the design cycle.
  • Optimization benefits from run-time mode adaptation techniques, such as dynamic power management or application adaptation to varying workloads.


Ziele

The primary objective of COMPLEX is to develop an innovative, highly efficient and productive design methodology and a holistic framework for iteratively exploring the design space of embedded hardware/software (HW/SW) systems.

 

Technologien

The COMPLEX framework is a design flow with performance and power aware virtual prototyping of an embedded HW/SW system. Several well established ESL synthesis and analysis tools from vendors such as CoWare, ChipVision, EDALab, and Magillem will be augmented and combined into the seamless COMPLEX design flow.
For co-development the COMPLEX framework follows a new approach using a unified internal representation of the HW and SW, called block annotated C++ (BAC++). It is generated by SW cross-compilers and HW behavioural synthesis tools. In the COMPLEX framework, the generated BAC++ code is integrated into a SystemC™/TLM2 virtual platform model, enabling fast system simulation.
The hardware/software co-exploration considers both the architecture design space and the application space to assess trade-offs when designing next-generation embedded systems. The co-exploration is multi-objectively assessing the design quality and optimizing the system platform with respect to performance, power, reliability metrics, etc. The optimization benefits from run-time mode adaption techniques, such as dynamic power management or application adaption to evolving workloads, can be maximised and reported to successive synthesis steps using standardized output formats.
The framework combines several standards for system modelling and integration: Possible design entry is either in C++/SystemC or a MARTE/UML model, offering seamless integration into a model-driven design approach.

Personen

Projektleitung Intern

Wissenschaftliche Leitung

Publikationen
Abstracting TCAD aging models above the circuit level

Malte Metzdorf, Domenik Helms, Reef Eilers, Wolfgang Nebel; DATE - Design, Automation, and Test in Europe; 03 / 2015

Advanced SystemC Tracing and Analysis Framework for Extra-Functional Properties

Philipp A. Hartmann and Kim Grüttner and Wolfgang Nebel; The 11th International Symposium on Applied Reconfigurable Computing (ARC'15); 04 / 2015

Facilitating Cross-Layer Reliability Management through Universal Reliability Information Exchange

Enrico Costenaro, Domenik Helms, Nematollah Bidokhti, Adrian Evans, Maximilian Glorieux and Dan Alexandrescu; DAC - Design Automation Conference; 06 / 2015

An ESL Timing & Power Estimation and Simulation Framework for Heterogeneous SoCs

Kim Grüttner and Philipp A. Hartmann and Tiemo Fandrey and Kai Hylla and Daniel Lorenz and Stefan Stattelmann and Björn Sander and Oliver Bringmann and Wolfgang Nebel and Wolfgang Rosenstiel; Proceedings of International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), Samos, Greece, July 14-17, 2014; 07 / 2014

Beyond algorithms and performance: Modelling extra-functional properties in SystemC - Keynote

Hartmann, Philipp A.; Indian SystemC User's Group Conference; 004 / 2013

Closing the gap between technology and application needs

Nebel, Wolfgang and Helms, Domenik and Grüttner, Kim and Oppenheimer, Frank; 05 / 2013

Early Power & Timing Estimation of Custom Hardware Blocks based on Automatically Generated Combinatorial Macros

Hylla, Kai and Hartmann, Philipp A. and Helms, Domenik and Nebel, Wolfgang; 003 / 2013

Leveraging Non-Intrusive TLM-2.0 Transaction Introspection for Power-Aware Virtual Prototyping - Tutorial

Hartmann, Philipp A.; Indian SystemC User's Group Conference; 004 / 2013

Modelling, simulation and advanced tracing for extra-functional properties in SystemC

Hartmann, Philipp A.; European SystemC Users' Group Meeting; 009 / 2013

Performance and Energy Modeling and Analysis in COMPLEX Virtual Platform

Grüttner, Kim and Hartmann, Philipp A. and Oppenheimer, Frank; 002 / 2013

The COMPLEX reference framework for HW/SW Co-Design and Power Management Supporting Platform-Based Design-Space Exploration

Gruettner, Kim and Hartmann, Philip A. and Hylla, Kai and Rosinger, Sven and Nebel, Wolfgang and Herrera, F. and Villar, E. and Brandolese, C. and Formaciari, W. and Palermo, G. and Ykman-Couvreur, C. and Quagila, D. and Ferrero, F. and Valencia, R.; Microprocessors and Microsystems; 009 / 2013

COMPLEX - COdesign and power Management in PLatform-based design space EXploration

Grüttner, Kim and Hartmann, Philipp A. and Hylla, Kai and Rosinger, Sven and Nebel, Wolfgang and Herrera, Fernando: Villar, Eugenio and Brandolese, Carlo and Fornaciari, William and Palermo, Gianluca and Ykman-Couvreur, Chantal and Quaglia, Davide and Ferrero, Francisco and Valencia, Raul; 009 / 2012

DATE 2012 Friday Workshop (W2): Quo Vadis, Virtual Platforms? Challenges and Solutions for Today and Tomorrow

Leupers, Rainer and Haubelt, Christian and Rettberg, Achim and Grüttner, Kim; 003 / 2012

From RTL IP to Functional System-Level Models with Extra-Functional Properties

Lorenz, Daniel and Grüttner, Kim and Bombieri, Nicola and Guarnieri, Valerio, Bocchio, Sara; 10 / 2012

Nicht-invasive Simulation des Energieverbrauchs von Hardware-Komponenten auf Systemebene mit SystemC

Lorenz, Daniel and Hartmann, Philipp A. and Grüttner, Kim and Rettberg, Achim; 003 / 2012

Non-invasive Power Simulation at System-Level with SystemC

Lorenz, Daniel and Hartmann, Philipp A. and Grüttner, Kim and Nebel, Wolfgang; 009 / 2012

Rapid Prototyping of Complex HW/SW Systems using a Timing and Power Aware ESL Framework

Grüttner, Kim and Hylla, Kai and Rosinger, Sven and Nebel, Wolfgang; System Specification and Design Languages - Selected Contributions from FDL 2010; 001 / 2012

Run-time Resource Management based on Design Space Exploration

Ykman-Couvreur, Chantal and Hartmann, Philipp A. and Palermo, Gianluca and Colas-Bigey, Fabien and San, Laurent; 10 / 2012

Sleep-Transistor Based Power-Gating Tradeoff Analyses

Rosinger, Sven and Nebel, Wolfgang; 009 / 2012

Towards Performance and Energy Efficient Embedded System Design using Virtual Platforms

Grüttner, Kim and Hartmann, Philipp A. and Fandrey, Tiemo and Hylla, Kai and Helms, Domenik and Oppenheimer, Frank and Nebel, Wolfgang and Rettberg, Achim; 006 / 2012

A Framework for Generic HW/SW Communication using Remote Method Invocation

Hartmann, Philipp A. and Grüttner, Kim and Ittershagen, Philipp and Rettberg, Achim; 006 / 2011

A Framework for Generic HW/SW Communication using Remote Method Invocation

Hartmann, Philipp A. and Ittershagen, Philipp and Grütter, Kim and Oppenheimer, Frank and Rettberg, Achim; 003 / 2011

Audio Driven Video Surveillance System using COMPLEX design flow

Colas-Bigey, Fabien and Boccio, Sara and Ykman-Couvreur, Chantal and Palermo, Gianluca and Hartmann, Philipp A.; 003 / 2011

Behavioral-Level Thermal- and Aging-Estimation Flow

Rosinger, Sven and Metzdorf, Malte and Helms, Domenik and Nebel, Wolfgang; Test Workshop (LATW), 2011 12th Latin American; 03 / 2011

Challenges of Multi- and Many-Core Architectures for Electronic System-Level Design

Grüttner, Kim and Hartmann, Philipp A. and Reinkemeier, Philipp and Oppenheimer, Frank and Nebel, Wolfgang; 007 / 2011

Ein generisches Treiber-Framework zur HW/SW-Kommunikation mittels OSSS-RMI

Ittershagen, Philipp and Hartmann, Philipp A. and Grüttner, Kim and Rettberg, Achim; 002 / 2011

Enabling Timing and Power Aware Virtual Prototyping of HW/SW Systems

Grüttner, Kim and Hylla, Kai and Rosinger, Sven and Hartmann, Philipp A. and Nebel, Wolfgang; 003 / 2011

Impact Simulation of Changes to Development Processes: An ESL Case Study

Poppen, Frank and Koppe, Roland and Hahn, Axel and Grüttner, Kim; 009 / 2011

Non-intrusive TLM-2.0 Transaction Observation, Interception, and Augmentation

Hartmann, Philipp A. and Fakih, Maher A. and Grüttner, Kim; 009 / 2011

Simulink and Virtual Hardware Platform Co-Simulation for Accurate Timing Analysis of Embedded Control Software

Fakih, Maher A. and Poppen, Frank and Grüttner, Kim, Rettberg, Achim; ASIM-Konferenz STS/GMMS 2011; 002 / 2011

Towards Dependability-aware Design of Hardware Systems using extended Program State Machines

Grüttner, Kim and Herrholz, Andreas and Kühne, Ulrich and Große, Daniel and Rettberg, Achim and Nebel, Wolfgang and Drechsler, Rolf; 003 / 2011

Using the COMPLEX Design Flow for Space Domain Applications

Ferrero, Francisco and Grüttner, Kim and Herrera, Fernando and Palermo, Gianluca and Vanthournout, Bart and Vaumorin, Emmanuel; 003 / 2011

Distributed Resource-Aware Scheduling for Multi-Core Architectures with SystemC

Hartmann, Philipp A. and Grüttner, Kim and Rettberg, Achim and Podolski, Ina; 009 / 2010

Towards a Synthesis Semantics for SystemC Channels

Grüttner, Kim and Kleen, Henning and Oppenheimer, Frank and Rettberg, Achim and Nebel, Wolfgang; 10 / 2010

Towards an ESL Framework for Timing and Power Aware Rapid Prototyping of HW/SW Systems

Grüttner, Kim and Hylla, Kai and Rosinger, Sven and Nebel, Wolfgang; 009 / 2010

Partner
STMicroelectronics srl
www.st.com
Thales Communications
www.thalescomminc.com
ChipVision Design Systems AG
EDALab srl
www.edalab.it
Magillem Design Services
www.magillem.com
Politecnico di Milano
www.elet.polimi.it/index.jsp
Universidad de Cantabria
www.unican.es/index.html
Politecnico di Torino
www.polito.it

Laufzeit

Start: 01.12.2009
Ende: 30.11.2012

Website des Projekts

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