Grüttner, Kim and Hartmann, Philipp A. and Hylla, Kai and Rosinger, Sven and Nebel, Wolfgang and Herrera, Fernando: Villar, Eugenio and Brandolese, Carlo and Fornaciari, William and Palermo, Gianluca and Ykman-Couvreur, Chantal and Quaglia, Davide and Ferrero, Francisco and Valencia, Raul
The consideration of an embedded device’s power consumption and its management is increasingly important nowadays. Currently, it is not easily possible to integrate power information already during the platform exploration phase. In this paper, we discuss the design challenges of today’s heterogeneous HW/SW systems regarding power and complexity, both for platform vendors as well as system integrators.
As a result, we propose a design flow concept that combines system-level power optimization techniques with platform-based rapid prototyping. Virtual executable prototypes are generated from MARTE/UML and functional C/C++ descriptions, which then allows to study different platforms, mapping alternatives and power management strategies.
Our proposed flow combines system-level timing and power estimation techniques available in commercial tools with platformbased rapid prototyping. We propose an efficient code annotation technique for timing and power properties that enables fast host execution as well as adaptive collection of power traces. Combined with a flexible design-space exploration (DSE) approach our flow allows a trade-off between different platforms, mapping alternatives, and optimization techniques, based on domainspecific workload scenarios. The proposed flow is currently under implementation in the COMPLEX FP7 European integrated project.
09 / 2012
COdesign and power Management in PLatform-based design space EXploration