An Open-Source Safety Monitor Co-Processor for RISC-V Leveraging Contract-Based Design and Configurable Monitors

BIB
Frank Oppenheimer, Jörg Walter, Sven Mehlhop
Mai / 2025
misc
ISOLDE
Customizable Instruction Sets and Open Leveraged Designs of Embedded riscv processors
10.13140/RG.2.2.12593.90728
https://www.researchgate.net/publication/391732948_An_Open-Source_Safety_Monitor_Co-Processor_for_RISC-V_Leveraging_Contract-Based_Design_and_Configurable_Monitors

OFFIS Autoren

Dr.-Ing. Jörg Walter
Dr.-Ing.
Jörg Walter
M.Sc. Sven Mehlhop
Sven Mehlhop, M.Sc.