A unified approach to object-oriented VHDL

Radetzki, Martin and Putzke-Röming, Wolfram and Nebel, Wolfgang
Abstraction and reuse are the keys to deal with the increasing complexity of electronic systems. We motivate the application of object-oriented modeling as an approach to achieve more reuse and higher abstraction in hardware design. This requires an object-oriented hardware description language, preferably an extension to VHDL. Several variants of such OO-VHDL are being discussed controversially. We present our unified approach, Objective VHDL, adding object-oriented features to the VHDL design entity as well as to the type system to provide a maximum of modeling power.
01 / 1998

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