Therminator Modeling, Control and Management of Thermal Effects in Electronic Circuits of the Future


Thermal effects have always been important in determining the performance, cost and reliability of both the device itself as well as for the application in which it is used. For example, packages that are able to sustain high temperatures are expensive, as are heat-sinks and cooling systems. In addition, high operating temperatures tend to cause performance degradation or even malfunctioning of circuits and components, thus reducing the reliability of the end application. For this reason, models that predict the thermal characteristics of semiconductor devices have long been included in the EDA (Electronic Design Automation) software that chip manufacturers use to design their devices. However, these existing design tools are not sufficient in terms of being able to handle the new materials and extremely small structures that will be required in future applications and technologies where heat/power management is of vital importance.


This 3-year project is designed to maintain the strong positions that Europe's semiconductor and electronics equipment companies have achieved in highly competitive application areas such as automotive systems and factory automation where the semiconductor devices are often required to work under harsh conditions with temperatures in excess of 100 degrees Celsius.


The project will draw on the complementary expertise of industrial partners (semiconductor manufacturers and EDA suppliers), research institutions and universities to meet three key goals:

  • To devise innovative thermal models, usable at different levels of abstraction, and to interface/integrate them into existing simulation and design frameworks;
  • To develop new, thermal-aware design solutions, customized for the different technologies and application domains of interest;
  • To enhance existing EDA solutions via thermal-aware add-on tools that will enable designers to address temperature issues more effectively using their existing design flows.

Projektleitung Intern

Wissenschaftliche Leitung

High Level Thermal Estimation Flow

Rosinger, Sven; 007 / 2012

Behavioral-Level Thermal- and Aging-Estimation Flow

Rosinger, Sven and Metzdorf, Malte and Helms, Domenik and Nebel, Wolfgang; Test Workshop (LATW), 2011 12th Latin American; 03 / 2011

Facilitating Cross-Layer Reliability Management through Universal Reliability Information Exchange

Enrico Costenaro, Domenik Helms, Nematollah Bidokhti, Adrian Evans, Maximilian Glorieux and Dan Alexandrescu; DAC - Design Automation Conference; 06 / 2015

Abstracting TCAD aging models above the circuit level

Malte Metzdorf, Domenik Helms, Reef Eilers, Wolfgang Nebel; DATE - Design, Automation, and Test in Europe; 03 / 2015

STMicroelectronics srl
Infineon Technologies AG
NXP Semiconductors Hamburg
Gradient Design Automation
Synopsys Group
Budapest University of Technology and Economics
Centre Suisse d'Electronique et de Microtechnique S.A.
Centre National de la Recherche Scientifique (Frankreich)
Politecnico di Torino
Università di Bologna
Fraunhofer-Institut für Integrierte Schaltungen IIS Institutsteil Entwurfsautomatisierung EAS


Start: 01.01.2010
Ende: 31.12.2013