The main objective of the POET project is to develop a new designmethodology and tool suite for power estimation and optimisation in heterogeneous embedded SoC designs. The key innovation of the approach is to enable design space exploration for low power system architectures, algorithm optimisations and system partitioning - from the earliest design steps seamlessly through to RT level (i.e. to the interface with standard industrial synthesis tools). The POET design framework will operate at each level of abstraction, i.e. algorithmic, hardware/software partition, cycle-accurate RT level. POET tools will manage and optimise all major contributors to power dissipation in large SoC designs such as ASICs, cores and processors, memories, communication and I/O interfaces.
The main result of the project developed by OFFIS in co-operation with theUniversity of Oldenburg is an enhancement of the ORINOCO tool suite. New optimization features at the source level and support for low power high-level synthesis will be integrated.
Nebel, Wolfgang and Schmidt, Eike; Tagungsband; 001 / 2004
Stammermann, Ansgar; Tagungsband ICCAD; 001 / 2003
Kabous, Laila and Nebel, Wolfgang; 009 / 2003
Stammermann, Ansgar and Helms, Domenik and Schulte, Milan and Schulz, Arne and Nebel, Wolfgang; Tagungsband PATMOS 2003; 001 / 2003
Sarker, Bodhisatya and Schulte, Milan and Hillers, Mark and Nebel, Wolfgang; Tagungsband; 005 / 2003
Domenik Helms, Eike Schmidt, Arne Schulz, Ansgar Stammermann, Wolfgang Nebel; PATMOS; 09 / 2002