Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication - OFFIS

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Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

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All authors

Ralf Stemmer and Maher Fakih

Booktitle

MBMV 2017

Publishing date

2 / 2017

Type of Publication

inproceedings

Projects

SafePower
Safe and secure mixed-criticality systems with low power requirements

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