With the rapid development of physical target technologies, designing an integrated circuit becomes a task of growing complexity. Potentially high functionality combined with small geometrical dimensions provide ideal conditions for complex signal processing in mobile devices. Analogous to the software-crisis of the seventies, the resulting complexity-problem shall be addressed through design on high abstraction layers and reuse of optimized modules, which can be composed to complete signal processing systems. However, at this time there exists no continuous power-oriented design methodology for algorithmic system specifications.

In this project it will be shown that the gap can be closed by combining a design tool for algorithmic synthesis and power-evaluation with a heuristics-driven module-selection from a multi-level low-power macro-library.