Power-simulation of cell based ASICs: accuracy- and performance trade-offs.

BIB
Rabe, Dirk and von Cölln (Jochens), Gerd and Kruse, Lars
Within this paper the gate-level power-simulation tool GliPS (Glitch Power Simulator) is presented, which gives excellent accuracy (in the range of transistor-level simulators) at high performance. The high accuracy is achieved by putting emphasis on delay- and power-modelling. The impact of these modelling factors on accuracy and performance is demonstrated by comparing GliPS to other tools on circuit-level and a simple toggle count based power simulator TPS on gate level.
01 / 1998
inproceedings
DATE 1998, Design, Automation and Test in Europe, Paris
EURIPIDES
EURopean Intellectual Property In Design Electronic Systems
JESSI
Verlustleistungsanalyse integrierter Schaltungen (Sorry - only available in german!)