The new chip technologies below 90 nm will enable adding more flexibility and functionality to today`s and future products. Already existing examples for the available potentials are cell phones with organizer functionality and camera. However, the gain in flexibility is limited by the increase in design costs and power consumption of the products.
To counteract this effect, the goal of MAP2 is to develop a low-power design flow, which will reduce the design costs using an extensive automation of the design process. For this purpose, the EDA tools of BullDAST and ChipVision, which are complementary to each other, will be integrated in a shared seamless design flow to work together more efficiently.
Power-management algorithms will be explored to minimize the power consumption of the designed product. These algorithms will be incorporated to prototype tools to extend the existing EDA-tools. These prototype tools will complete the new developed design flow by automatic insertion of these techniques into the design. That will for example enable to shut off parts of the chip. The effectiveness of the prototype tools will be evaluated by the project partner CSEM. Thereby, the MAP2-methods and tools will allow CSEM to already develop first products with a low power consumption.
The support of SMEs is an essential project goal of MAP2. Both BullDAST and ChipVision will integrate the results into future versions of their products PowerChecker and ORINOCO to improve their competetiveness and secure a privileged position in their market.
Rosinger, Sven and Helms, Domenik and Nebel, Wolfgang; Journal of Embedded Computing Power Gating; 009 / 2009
Rosinger, Sven and Helms, Domenik and Nebel, Wolfgang; proceeding in PATMOS_2007; 001 / 2007