ANDRES Analysis and Design of run-time Reconfigurable, heterogeneous Systems

Goal

The high level objective of the ANDRES project is to improve the competitiveness of innovative European industries, such as the telecommunication and automotive industry, by reducing the design time and cost of

highly integrated embedded systems. These systems are heterogeneous in nature. They include up to four different domains: software, analogue hardware, static hardware, and dynamically reconfigurable hardware, the latter gaining importance because of its new attractive combination of flexibility and efficiency. Currently no methodology exists allowing to seamlessly specify, simulate, synthesize and verify such heterogeneous systems, because each domain comes with its own computational models, languages and design tools. This prevents early holistic system validations and postpones the system verification to the system integration phase causing long, costly and most importantly time consuming design reiterations.

 

ANDRES will develop solutions to overcome these incompatibilities by developing an integrated modelling approach for heterogeneous embedded systems. This approach builds on the open-source modelling language SystemC already adopted by many European companies. Next ANDRES will close the gaps in the tool flow for dynamically reconfigurable hardware by developing a tool to translate adaptive models onto RTL descriptions. The prime result of ANDRES is a seamless design flow, which provides the possibility of designing embedded hardware/software systems on a higher level of abstraction emphasising in particular the application of run-time reconfigurable architectures.

Achieving these objectives is a major challenge and requires resources and expertise on the European level. Leading European companies providing application know-how and research institutes with outstanding experience in modelling and synthesis of embedded systems have joint hands in the ANDRES consortium to develop scientifically sound yet industrially applicable solutions for this challenge.

Persons

Scientific Director

Publications
Specification of adaptive HW/SW systems in SystemC

Herrera, Fernando and Villar, Eugenio and Hartmann, Philipp A.; 009 / 2008

Efficient modelling and simulation of embedded software multi-tasking using SystemC and OSSS

Hartmann, Philipp A. and Reinkemeier, Philipp and Kleen, Henning and Nebel, Wolfgang; 009 / 2008

OSSS+R Getting Started

Herrholz, A.; 007 / 2008

Modelling of run-time reconfigurable hardware - final library elements

Grüttner, Kim and Herrholz, Andreas and Hartmann, Philipp Andreas; 001 / 2008

OSSS+R: A Framework for Application Level Modelling and Synthesis of Reconfigurable Systems

Schallenberg, Andreas and Herrholz, Andreas and Hartmann, Philipp A. and Oppenheimer, Frank and Nebel, Wolfgang; Proceedings of Design, Automation and Test in Europe (DATE'09), Nice, France; 004 / 2009

Using SystemC for an extended MATLAB/simulink verification flow

Hylla, Kai and Oetjens, Jan-Hendrik and Nebel, Wolfgang; Specification, Verification and Design Languages, 2008. FDL 2008. Forum on; 009 / 2008

Adaptive Scheduling of Dynamic Reconfiguration in Stream-Based Applications

Görgen, Ralph and Oppenheimer, Frank and Nebel, Wolfgang; 001 / 2008

Connecting SystemC-AMS Models with OSCI TLM 2.0 Models using Temporal Decoupling

Damm, Markus and Herrholz, Andreas and Grimm, Christoph and Haase, Jan and Nebel, Wolfgang; Proceedings of the Forum on Specification and Design Languages 2008; 009 / 2008

Interfacing cycle-accurate TLM Models and analog-mixed signal SDF Clusters in SystemC - a Case Study

Herrholz, A.; Workshop on Interaction of Analog/Mixed-Signal Systems and Transaction Level Modelling; 001 / 2008

The ANDRES Project : Analysis and Design of run-time reconfigurable, heterogeneous Systems

Herrholz, Andreas and Oppenheimer, Frank and Hartmann, Philipp A. and Schallenberg, Andreas and Nebel, Wolfgang and Damm, M. and Herrera, F. and Villar, E. and Sander, I. and Jantsch, A. and Fouilliart, A.-M. and Martinez, Marcos; Proceedings of 2007 International Conference on Field Programmable Logic and Applications; 008 / 2007

ANDRES - ANalysis and Design of run-time REconfigurable, heterogeneous Systems

Herrholz, Andreas and Oppenheimer, Frank and Schallenberg, Andreas and Nebel, Wolfgang and Grimm, Christoph and Damm, Markus and Herrera, Fernando and Villar, Eugenio and Sander, Ingo and Jantsch, Axel and Fouilliart, Anne-Marie and Martinez, Marcos; Proceedings of Design, Automation and Test in Europe 2007, Nice, France; 004 / 2007

Overall Modelling Framework for AHES (Adaptive Heterogeneous Embedded Systems) - ANDRES Project Deliverable D1.6b

Wenninger, J. and Damm, M. and Haase, J. and Ou, J. and Grüttner, K. and Hartmann P. A. and Herrholz, A. and Herrera, F. and Sander, I and Zhu, J.; 008 / 2009

High-Level Estimation and Trade-Off Analysis for Adaptive Real-Time Systems

Sander, Ingo and Herrholz, Andreas and Zhu, Jun and Hartmann, Andreas Philipp and Jantsch, Axel and Nebel, Wolfgang; Proceedings of the 2009 IEEE Symposium on Parallel & Distributed Processing; 005 / 2009

Modeling of Embedded Software Multitasking in SystemC/OSSS

Hartmann, Philipp A. and Reinkemeier, Philipp and Kleen, Henning and Nebel, Wolfgang; Languages for Embedded Systems and their Applications; 005 / 2009

Modelling Control Systems in SystemC AMS ̣ Benefits and Limitations

Hartmann, Philipp A., Reinkemeier, Philipp and Rettberg, Achim and Nebel, Wolfgang; IEEE SOC Conference Digest of Technical Papers; 009 / 2009

ANDRES - Analysis and Design of run-time Reconfigurable, heterogeneous Systems

Grüttner, Kim and Oppenheimer, Frank; 003 / 2010

Eine Fallstudie zur dynamischen Rekonfiguration von Hardware: "Pain or Gain?"

; Tagungsband des 10. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen"; 003 / 2007

ANDRES - Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems

Grüttner, Kim and Hartmann, Philipp A. and Herrholz, Andreas and Oppenheimer, Frank; Reconfigurable Computing - From FPGAs to Hardware/Software Codesign; 009 / 2011

Partners
DS2 (Diseno de Sistemas en Silicio, S.A.), Paterna, Spain
www.ds2.es/corporate/legal.html
Kungliga Tekniska Högskolan
www.kth.se
Thales Communications
www.thalescomminc.com
Universidad de Cantabria
www.unican.es/index.html

Duration

Start: 31.05.2006
End: 29.09.2009

Website of project

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