Matlab/Simulink is a wide-spread tool for model-based design of embedded systems.
Supporting hierarchy, domain specific building blocks, functional simulation and automatic
code-generation, makes it well-suited for the design of control and signal processing systems.
In this work, we propose an automated
translation methodology for a subset of Simulink models to Synchronous dataflow Graphs (SDFGs) including the automatic code-generation of SDF-compatible embedded code.
A translation of Simulink models to SDFGs, is very suitable due to Simulink actor-oriented
modeling nature, allowing the application of several optimization techniques from the
SDFG domain. Because of their well-defined semantics, SDFGs can be analyzed at compiling
phase to obtain deadlock-free and memory-efficient schedules. In addition,
several real-time analysis methods exist which allow throughput-optimal mappings of
SDFGs to Multiprocessor on Chip (MPSoC) while guaranteeing upper-bounded latencies.
The correctness of our translation is justified by integrating the SDF generated code as a
software-in-the-loop (SIL) and comparing its results with the results of the
model-in-the-loop (MIL) simulation of reference Simulink models.
The translation is demonstrated with the help of two case studies: a Transmission
Controller Unit (TCU) and an Automatic Climate Control.
1 / 2017
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