@phdthesisThaden2013, Author = {Thaden, Eike Martin}, Title = {Semi-Automatic Optimization of Hardware Architectures in Embedded Systems}, Year = {2013}, Pages = {261}, Month = {06}, Url = {http://oops.uni-oldenburg.de/id/eprint/1491}, School = {Carl von Ossietzky Universit├Ąt Oldenburg}, type = {phdthesis}, note = {The effort for the development of a safety-critical embedded system can be reduced tremendously if a similar existing system is used as basis which is then extended by additional functionality. However, this is a very challenging task because in general f}, Abstract = {The effort for the development of a safety-critical embedded system can be reduced tremendously if a similar existing system is used as basis which is then extended by additional functionality. However, this is a very challenging task because in general for both the already integrated and the new parts of such a system complex constraints have to be satisfied to guarantee their correct functionality. Furthermore, larger embedded systems are typically realized as distributed systems with multiple processors connected by a complex communication infrastructure. This leads to a huge number of design alternatives suitable for the extension of such a system thus complicating the manual search for cost-efficient solutions or even rendering it impossible. Searching entirely automatically is not too promising as well because usually lots of informal requirements have to be satisfied, some of which are concretized while already searching for possible solutions. In this work a semi-automatic approach for the optimization of hardware architectures of embedded systems is presented that supports developers in extending existing systems by adding additional functionality implemented as software tasks. The two-tier optimization process explores the design space defined by constraints for valid allocations of the software tasks to the hardware architecture. If necessary, existing processors can be replaced by more powerful ones or additional processors can be integrated while aiming for a cost-efficient hardware architecture. The optimization approach exploits that larger embedded systems typically use a hierarchical structure where the hardware architecture is composed from hardware subsystems: Firstly, a global (system-wide) optimization step computes pre-allocations of all additional software tasks onto subsystems based on an abstract characterization of the required and provided computation capacity. Separately for each subsystem, the pre-allocated tasks are then allocated to processors by local optimization steps under consideration of all subsystem-specific constraints. Software tasks that could not be allocated are handed back to the global tier for being allocated in later iterations. Exact optimization methods are presented for both the global and the local optimization steps. Finally, the results of an extensive evaluation based on three benchmarks are presented. In this evaluation both optimization methods have been compared with alternative approaches.} @COMMENTBibtex file generated on