Gruettner, Kim and Hartmann, Philip A. and Hylla, Kai and Rosinger, Sven and Nebel, Wolfgang and Herrera, F. and Villar, E. and Brandolese, C. and Formaciari, W. and Palermo, G. and Ykman-Couvreur, C. and Quagila, D. and Ferrero, F. and Valencia, R.
Microprocessors and Microsystems
The consideration of an embedded device's power consumption and its management is increasingly important nowadays. Currently, it is not easily possible to integrate power information already during the platform exploration phase. In this paper, we discuss the design challenges of today's heterogeneous HW/SW systems regarding power and complexity, both for platform vendors as well as system integrators.
As a result, we propose a reference framework and design flow concept that combines system-level power optimization techniques with platform-based rapid prototyping. Virtual executable prototypes are generated from MARTE/UML and functional C/\cpp descriptions, which then allows to study different platforms, mapping alternatives, and power management strategies.
Our proposed flow combines system-level timing and power estimation techniques available in commercial tools with platform-based rapid prototyping. We propose an efficient code annotation technique for timing and power properties enabling fast host execution as well as adaptive collection of power traces. Combined with a flexible design-space exploration (DSE) approach our flow allows a trade-off analysis between different platforms, mapping alternatives, and optimization techniques, based on domain-specific workload scenarios. The proposed framework and design flow has been implemented in the COMPLEX FP7 European integrated project.
09 / 2013
COdesign and power Management in PLatform-based design space EXploration