Ralf Stemmer, M.Sc. Scientific Researcher

M.Sc. Ralf Stemmer
Contact
Activities

Position at OFFIS

Scientific Researcher

Research and Developement Division

Verkehr / Hardware/Software-Entwurfsmethodik

Competence Cluster

Embedded Systems Design (ESD)

Position at the University

News

+49 441 9722-229

ralf.stemmer(at)offis.de

O85

OFFIS - Institut für Informatik
Escherweg 2
26121 Oldenburg
GERMANY

Publications
of Ralf Stemmer, M.Sc.

2021

A Fast Yet Accurate Message-level Communication Bus Model for Timing Prediction of SDFGs on MPSoC

Hai-Dang Vu and Sebastien Le Nours and Sebastien Pillement and Ralf Stemmer and Kim Grüttner; 26th Asia and South Pacific Design Automation Conference (ASP-DAC) 2021; 01 / 2021

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A Measurement-based Message-level Timing Prediction Approach for Data-Dependent SDFGs on Tile-based Heterogeneous MPSoCs

Ralf Stemmer, Hai-Dang Vu, Sébastien Le Nours, Kim Grüttner, Sébastien Pillement, Wolfgang Nebel; Applied Sciences; 2021

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A Measurement-based Performance Evaluation Framework for Neural Networks on MPSoCs

Quentin Dariol, Sebastien Le Nours, Sebastien Pillement, Ralf Stemmer, Kim Grüttner, Domenik Helms; 15ème Colloque National du GDR SOC2; Jun / 2021

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2020

Towards Probabilistic Timing Analysis for SDFGs on Tile Based Heterogeneous MPSoCs

Ralf Stemmer and Hai-Dang Vuy and Kim Grüttner andSebastien Le Nours and Wolfgang Nebel and Sebastien Pillement; In Proceedings of Embedded Real Time Software and Systems Conference (ERTS 2020); 2020

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2019

Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs

Ralf Stemmer and Hai-Dang Vu and Kim Grüttner and Sebastien Le Nours and Wolfgang Nebel and Sebastien Pillement; International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIX); 2019

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Experimental Evaluation of Scenario Aware Synchronous Data Flow Based Power Management

Oliver Klemp and Maher Fakih and Kim Grüttner and Ralf Stemmer and Wolfgang Nebel; International Conference on Omni-layer Intelligent systems (COINS); 2019

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Feasibility Study of Probabilistic Timing Analysis Methods for SDF Applications on Multi-Core Processors

Ralf Stemmer and Hai-Dang Vu and Maher Fakih and Kim Grüttner and Sebastien Le Nours and Sebastien Pillement; Mar / 2019

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Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication

Ralf Stemmer and Henning Schlender and Maher Fakih and Kim Grüttner and Wolfgang Nebel; 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE); 3 / 2019

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2017

Power and Execution Time Measurement Methodology for SDF Applications on FPGA-based MPSoCs

Christof Schlaak and Maher Fakih and Ralf Stemmer; HIP3ES 2017; 1 / 2017

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Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

Ralf Stemmer and Maher Fakih and Kim Grüttner and Wolfgang Nebel; 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO); 1 / 2017

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Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

Ralf Stemmer and Maher Fakih; MBMV 2017; 2 / 2017

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2016

Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

Ralf Stemmer and Maher Fakih and Kim Grüttner and Wolfgang Nebel; Integrating Dataflow, Embedded computing and Architecture (IDEA'2016); 4 / 2016

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