@inproceedings{Lor2012,Author = {Lorenz, Daniel and Hartmann, Philipp A. and Grüttner, Kim and Nebel, Wolfgang},Title = {Non-invasive Power Simulation at System-Level with SystemC},Year = {2012},Month = {09},type = {inproceedings},note = {Due to the increasing algorithmic complexity of today's embedded systems, consideration of extra-functional properties becomes more important. Extra-functional properties like timing, power consumption, and temperature need to be validated against given r},Abstract = {Due to the increasing algorithmic complexity of today's embedded systems, consideration of extra-functional properties becomes more important. Extra-functional properties like timing, power consumption, and temperature need to be validated against given requirements on all abstraction levels. For timing and power consumption at RT- and gate-level several techniques are available, but there is still a lack of methods and tools for power estimation and analyses at system and higher levels.In this paper we present an approach for non-invasive augmentation of functional SystemC(TM) TLM-2.0 components with power properties. The I/O behaviour of a TLM-2.0 component will be observed by a Protocol State Machine (PrSM) that generates trigger events to stimulate a Power State Machines (PSM). The PSM describes the component's internal power states and transitions and transitions between them.Each component's PSM is connected with a frequency and voltage dependent power model.We present first evaluation results of different IP components and compare our system-level power traces generation with state-of-the-art gate-level power simulations in terms of accuracy and simulation speed.}}@COMMENT{Bibtex file generated on }