@inproceedings{Fak2011,
Author = {Fakih, Maher A. and Poppen, Frank and Grüttner, Kim, Rettberg, Achim},
Title = {Simulink and Virtual Hardware Platform Co-Simulation for Accurate Timing Analysis of Embedded Control Software},

Year = {2011},
Pages = {17-26},
Month = {02},
Editor = {Andreas Brenke},
Publisher = {Shaker Verlag},
Isbn = {978-3-8322-9872-2},
Booktitle = {ASIM-Konferenz STS/GMMS 2011},
Organization = {ASIM/GI-Fachgruppe},
type = {inproceedings},
note = {The design of embedded systems that perform timing critical control algorithms is a challenging task. The goal of this paper is the definition of a design methodology and the implementation of its associated design flow that allows the validation
of tim},
Abstract = {The design of embedded systems that perform timing critical control algorithms is a challenging task. The goal of this paper is the definition of a design methodology and the implementation of its associated design flow that allows the validation
of timing requirements of a control system. The design entry is a functional model of a control system specified in Matlab/Simulink. By modeling the environment (or the process to be controlled) a functional verification of the control system can be
made. In a next step C code is automatically generated from the controller model and cross-compiled to be executed on a virtual hardware platform implemented with the SystemC-based SoCLib framework. In SoCLib a measurement-based timing validation method was implemented to measure the execution of the generated code at a cycle accurate level. For enabling this methodology a co-simulation between
SoCLib and Simulink was implemented allowing a virtual-platform-in-the-loop verification. Our approach benefits from  flexible hardware model introspections and visualization techniques compared to traditional hardware-in-the-loop techniques. The approached design flow shows great flexibility in terms of validating the functionality and performance of different models with different complexities on different
virtual platforms, and thus allows the forecast of design decision effects at minimal costs and short development times in early phases. Furthermore, the design flow contributes to the validation of timing requirements of critical control algorithms through measuring cycle accurate execution times. We will demonstrate the benefits of the proposed approach using an ignition controller application mapped on a
virtual hardware platform.}
}
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