Hence, we develop in this application domain concepts and tools to improve the design process for so-called “Systems on a Chip” (SoC). It is the main approach to confront complexity with the enhancement of expressiveness of the electronic system level (ESL) languages, and thereby enable a seamless design process from a detailed specification all the way to the physical implementation. The modeling and refinement methodology enables the mapping of adaptive applications on diverse heterogeneous implementation platforms.
Persons
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G
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Dr. Ing.
Philipp Ittershagen
E-Mail: Philipp.Ittershagen(at)offis.de, Phone: +49 441 9722-715, Room: O23
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P
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Henning Schlender
E-Mail: henning.schlender(at)informatik.uni-oldenburg.de, Phone: +49 441 9722-163, Room: O 92
Projects
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Digitaler Knoten 4.0
Duration: 2017 - 2019
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Productive4.0
Electronics and ICT as enabler for digital industry and optimized supply chain management covering the entire product lifecycle
Duration: 2017 - 2020S
Step-Up!CPS
Software Methods and Technologies for Modular Updates of Cyber-Physical Systems
Duration: 2018 - 2021
Publications
2019
A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs
Jan Cordes and Maher Fakih; International Conference on Omni-layer Intelligent systems (COINS); 2019
Experimental Evaluation of SAFEPOWER Architecture for Safe and Power-Efficient Mixed-Criticality Systems
Maher Fakih, Kim Grüttner, Sören Schreiner, Razi Seyyedi, Patricia Balbastre, Mikel Azkarate-askatsua, Peio Onaindia, Poggi Tomaso, Alina Lenz, Roman Obermaisser, Adele Maleki, Yosab Bebawy, Duncan Graham, Nera González Romero, Elena Quesada Gonzalez, Johnny Öberg, Tage Mohammadat, Timmy Sundström, Salvador Peiró Frasquet; Journal of Low Power Electronics and Applications; 2019
Experimental Evaluation of Scenario Aware Synchronous Data Flow Based Power Management
Oliver Klemp and Maher Fakih and Kim Grüttner and Ralf Stemmer and Wolfgang Nebel; International Conference on Omni-layer Intelligent systems (COINS); 2019
Feasibility Study of Probabilistic Timing Analysis Methods for SDF Applications on Multi-Core Processors
Ralf Stemmer and Hai-Dang Vu and Maher Fakih and Kim Grüttner and Sebastien Le Nours and Sebastien Pillement; Mar / 2019
Implementation of Time-Triggered MPSoCs with support for tool-based system generation on FPGAs
Jan-Henrik Bruhn and Kim Grüttner and Maher Fakih and Wolfgang Nebel; 4th International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS); 01 / 2019
Inertial Sensor Based Robot Gesture Detection for Safe Human-Robot Interaction
Johann-P. Wolff and Christian Haubelt and Rolf Schmedes and Kim Grüttner; 2nd International Workshop on Embedded Software for Industrial IoT (ESIIT) at DATE'19; 03 / 2019
Multi-Layer Time Coherency in the Development of ADAS/AD Systems: Design Approach and Tooling
Werner Damm and Günter Ehmen and Kim Grüttner and Philipp Ittershagen and Björn Koopmann and Frank Poppen and Ingo Stierand; The First Workshop on Design Automation for CPS and IoT (DESTION 2019); 2019
Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication
Ralf Stemmer and Henning Schlender and Maher Fakih and Kim Grüttner and Wolfgang Nebel ; 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE); 3 / 2019
SAFEPOWER: Application of Power Management Techniques in SoCs for Safety-Relevant Systems
Kim Grüttner and Maher Fakih and Mikel Azkarate-Askasua and Peio Onaindia and Roman Obermaisser; International Conference on Omni-layer Intelligent systems (COINS); 2019
Towards Distributed Runtime Monitoring with C++ Contracts
Rolf Schmedes and Philipp Ittershagen and Kim Grüttner; 2nd International Workshop on Embedded Software for Industrial IoT (ESIIT) at DATE'19; 03 / 2019
