Hence, we develop in this application domain concepts and tools to improve the design process for so-called “Systems on a Chip” (SoC). It is the main approach to confront complexity with the enhancement of expressiveness of the electronic system level (ESL) languages, and thereby enable a seamless design process from a detailed specification all the way to the physical implementation. The modeling and refinement methodology enables the mapping of adaptive applications on diverse heterogeneous implementation platforms.
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Henning Schlender
E-Mail: henning.schlender(at)informatik.uni-oldenburg.de, Phone: +49 441 9722-163, Room: O 92
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Productive4.0
Electronics and ICT as enabler for digital industry and optimized supply chain management covering the entire product lifecycle
Duration: 2017 - 2020S
Step-Up!CPS
Software Methods and Technologies for Modular Updates of Cyber-Physical Systems
Duration: 2018 - 2021U
UP2DATE
Intelligent software-UPDATE technologies for safe and secure mixed-criticality and high performance cyber physical systems
Duration: 2020 - 2022
Publications
2020
Static/Dynamic Real-Time Legacy Software Migration - A Comparative Analysis
Irune Yarza and Mikel Azkarate-Askatsua and Peio Onaindia and Philipp Ittershagen and Kim Grüttner and Wolfgang Nebel; 12th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO) at HIPEAC’20; 2020
Towards Probabilistic Timing Analysis for SDFGs on Tile Based Heterogeneous MPSoCs
Ralf Stemmer and Hai-Dang Vuy and Kim Grüttner and Sebastien Le Nours and Wolfgang Nebel and Sebastien Pillement; In Proceedings of Embedded Real Time Software and Systems Conference (ERTS 2020); 2020
Virtual Platform Based Development Environments for Low Power, Mixed Level Safety Critical Systems
Duncan Graham and Larry Lapides and Sören Schreiner and Kim Grüttner; Proc. of the Embedded World Conference; 2020
2019
A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs
Jan Cordes and Maher Fakih; International Conference on Omni-layer Intelligent systems (COINS); 2019
Design and Analysis of an Online Update Approach for Embedded Microprocessors
Patrick Uven and Philipp Ittershagen and Kim Grüttner; The 6th International Embedded Systems Symposium; 2019
Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs
Ralf Stemmer and Hai-Dang Vu and Kim Grüttner and Sebastien Le Nours and Wolfgang Nebel and Sebastien Pillement; International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIX); 2019
Experimental Evaluation of SAFEPOWER Architecture for Safe and Power-Efficient Mixed-Criticality Systems
Maher Fakih, Kim Grüttner, Sören Schreiner, Razi Seyyedi, Patricia Balbastre, Mikel Azkarate-askatsua, Peio Onaindia, Poggi Tomaso, Alina Lenz, Roman Obermaisser, Adele Maleki, Yosab Bebawy, Duncan Graham, Nera González Romero, Elena Quesada Gonzalez, Johnny Öberg, Tage Mohammadat, Timmy Sundström, Salvador Peiró Frasquet; Journal of Low Power Electronics and Applications; 2019
Experimental Evaluation of Scenario Aware Synchronous Data Flow Based Power Management
Oliver Klemp and Maher Fakih and Kim Grüttner and Ralf Stemmer and Wolfgang Nebel; International Conference on Omni-layer Intelligent systems (COINS); 2019
Feasibility Study of Probabilistic Timing Analysis Methods for SDF Applications on Multi-Core Processors
Ralf Stemmer and Hai-Dang Vu and Maher Fakih and Kim Grüttner and Sebastien Le Nours and Sebastien Pillement; Mar / 2019
Implementation of Time-Triggered MPSoCs with support for tool-based system generation on FPGAs
Jan-Henrik Bruhn and Kim Grüttner and Maher Fakih and Wolfgang Nebel; 4th International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS); 01 / 2019
