@inproceedings{Rab1998,Author = {Rabe, Dirk and von Cölln (Jochens), Gerd and Kruse, Lars},Title = {Power-simulation of cell based ASICs: accuracy- and performance trade-offs.},Year = {1998},Month = {01},Organization = {DATE 1998, Design, Automation and Test in Europe, Paris},type = {inproceedings},note = {Within this paper the gate-level power-simulation tool GliPS (Glitch Power Simulator) is presented, which gives excellent accuracy (in the range of transistor-level simulators) at high performance. The high accuracy is achieved by putting emphasis on dela},Abstract = {Within this paper the gate-level power-simulation tool GliPS (Glitch Power Simulator) is presented, which gives excellent accuracy (in the range of transistor-level simulators) at high performance. The high accuracy is achieved by putting emphasis on delay- and power-modelling. The impact of these modelling factors on accuracy and performance is demonstrated by comparing GliPS to other tools on circuit-level and a simple toggle count based power simulator TPS on gate level.}}@COMMENT{Bibtex file generated on }