@inproceedings{Rad1998,Author = {Radetzki, Martin and Putzke-Röming, Wolfram and Nebel, Wolfgang},Title = {A unified approach to object-oriented VHDL},Year = {1998},Month = {01},type = {inproceedings},note = {Abstraction and reuse are the keys to deal with the increasing complexity of electronic systems. We motivate the application of object-oriented modeling as an approach to achieve more reuse and higher abstraction in hardware design. This requires an objec},Abstract = {Abstraction and reuse are the keys to deal with the increasing complexity of electronic systems. We motivate the application of object-oriented modeling as an approach to achieve more reuse and higher abstraction in hardware design. This requires an object-oriented hardware description language, preferably an extension to VHDL. Several variants of such OO-VHDL are being discussed controversially. We present our unified approach, Objective VHDL, adding object-oriented features to the VHDL design entity as well as to the type system to provide a maximum of modeling power.}}@COMMENT{Bibtex file generated on }