@inproceedings{Sch1998,Author = {Schmidt, Eike and Huijbrechts, E. and Seelen, E. and Nieuweboer, W. and Kruse, Lars and von Cölln (Jochens), Gerd and Nebel, Wolfgang},Title = {Power consumption of on-chips roms: Analysis and modeling.},Year = {1998},Month = {01},Organization = {PATMOS 1998, Lyngby / Denmark},type = {inproceedings},note = {This paper addresses the problem of modeling the power consumption of on-chip ROMs for gate-level and RT-level power estimations. A route to memory power model development is presented that is also applicable to other memory architec-tures. The model prop},Abstract = {This paper addresses the problem of modeling the power consumption of on-chip ROMs for gate-level and RT-level power estimations. A route to memory power model development is presented that is also applicable to other memory architec-tures. The model proposed operates within an error margin of less than 5%. }}@COMMENT{Bibtex file generated on }