Publikationen
Titel
VHDL Behavioural Power Estimation for Telecom Devices
Publikationsart
Tagungsbeitrag
Alle Autoren
Allara, Alberto; Bombana, Massimo; Kruse, Lars; Nebel, Wolfgang; Schmidt, Eike; Stammermann, Ansgar
Zusammenfassung
In this paper we propose and formalise a VHDL based design methodology integrating behavioural synthesis and power-driven design. In order to evaluate this approach, estimations of power consumption are analysed for alternative architectures of a telecom design. Constrained behavioural and logic synthesis is then applied to generate the gate level netlist. A comparison with gate-level power evaluation is performed and commented. The flow is easily extendable to other application domains.
Erscheinungsdatum
2001
Veranstalter der Konferenz
FDL '01, Forum on Design Languages. - New York, N.Y.: ACM
