Publikationen
Titel
Comparing Executable Specifications regarding Power at Algorithmic Level (ANSI-C/SystemC)
Publikationsart
Poster
Alle Autoren
Poppen, Frank; Jährling, Alexander; Nebel, Wolfgang
Zusammenfassung
Nanometer scale design comes up with daunting challenges like signal integrity, design for yield and manufacturing or power dissipation. The latter is actually not a new challenge and EDA tools are available that allow for gate- and RT-level power estimation and optimization. For maximum savings, it is mandatory to consider power in the earliest stages of a design flow, since only at highest levels of abstraction, e.g. algorithmic level, the complete design-space is open for exploration and optimization.
Erscheinungsdatum
2007
Titel der Konferenz
CDNlive 2007
Veranstalter der Konferenz
Cadence Design Systems, Inc.
