Tagungsbeitrag
Görgen, Ralph; Oetjens, Jan-Hendrik; Freuer, Jan; Nebel, Wolfgang
Evaluation and refinement of system models often require modifications in the model that follow concrete rules. In this work, a method for a flexible automation of such transformation steps will be presented. It allows savings in development time and reduces the error proneness. Therefore, a tool for rule based manipulation of VHDL design descriptions has been extended to enable its use with system models in C++ and SystemC. An automotive electronics application, the integration of SystemC modules into a MATLAB/Simulink simulation by automatic wrapper generation, will show its use in the design process.
Analysis, Architectures and Modelling of Embedded Systems
englisch
2009
IFIP Advances in Information and Communication Technology
Springer
978-3-642-04283-6
International Embedded Systems Symposium 2009
IFIP
Automatic Transformation of System Models in Automotive Electronics